Recently, a microprocessor including a central processing unit (CPU) has been often used in various types of electronic apparatuses such as a portable terminal device, an e-card, and an information-processing device. In a case where this type of processor tries to access a storage device, a different access method is executed depending on whether the access destination is a register or an external memory. If the access destination is a register, for example, in a periphery of an arithmetic/logic unit (ALU), a copy register, a temporary register, etc. are arranged, so that to perform arithmetic processing, data is copied to the copy register or operated data is temporarily stored in the temporary register. This is because an ALU is suited for performing of register-to-register operation processing. If the access destination is an external memory, for example, in a case where information is written to an external memory address indicated by this external memory, the CPU outputs to this external memory a write address to specify the storage address and a write signal. To read information from an external memory address indicated by the register number, the CPU outputs to the external memory a read address to specify the storage address and a read signal.
In such a manner, to store information in an external memory address indicated by the register number or read it from the external memory address indicated by this register number, the CPU specifies a storage address (write address or read address) in this external memory. Such the processing is referred to as register-to-register addressing in many cases. This is because the external memory is typically mounted to a device different from the processor.
Further, this type of processor is mounted, besides an instruction execution/operation portion, with a read only memory (hereinafter referred to as ROM) for storing an instruction execution program, many registers used in instruction execution/operation processing, etc. With a conventional type microprocessor, in the case of incorporating this processor into an arbitrary electronic apparatus, an instruction and a behavior to be executed by the instruction correspond to each other in a one-to-one relationship. That is, the number of bits of an instruction used to specify a register, irrespective of whether it is used frequently or not, is made constant to often use a program created by using an instruction thus having a fixed length. Therefore, instruction with a fixed length is stored in a ROM and used.
On the other hand, with developments of semiconductor integrated-circuit technologies, a vast number of registers can be mounted in a processor (hereinafter referred to as “operation-processing device”). In this case, a correspondingly larger number of bits are required of an instruction which identifies a register. For example, in a case where 1024 registers are mounted, to identify one of the 1024 registers, the instruction needs to have 10 bits. However, with an actual program, not all of registers have the same access frequency, so that there are fluctuations in access frequency. The No. of a register accessed frequently is typically decided by a compiler.
With the conventional operation-processing device, a processing rate is decreased for the following reasons:
{circle around (1)} It takes a certain lapse of time to access an external memory. Accordingly, the side of a processor must create an interface that matches a storage device to be accessed because typically the storage device is rarely made especially so as to match a specific processor. Therefore, each time the storage device is accessed, access goes through the interface, so that access time is increased to decrease an operation-processing speed;
{circle around (2)} It takes a certain lapse of time to transfer data from an external memory to an ALU or vice versa. This is because an ALU typically accommodates register-to-register operation processing; in a case where there is data to be operated in the external memory, the data is once copied from the external memory to a copy register and then transferred from the copy register to the ALU so that it may undergo operation processing (register-to-memory addressing). It thus contributes to a decrease in operation-processing speed;
{circle around (3)} To integrate functions of a CPU, an RAM, a ROM, etc. into one chip so as to constitute one-chip microcomputer etc., a method for arranging the CPU and, in its periphery, the RAM, the ROM, etc. on the same semiconductor chip may be considered. This method relies on the register-to-memory addressing and so cannot be expected to improve the operation-processing speed;
{circle around (4)} Further, with the conventional operation-processing device, the following problems are involves in mounting of a ROM in which an instruction execution program is stored:                Looking at whole codes of this instruction execution program, there is a few case where, from, for example, ten bits of an instruction for specifying a register, the entire ten bits are used evenly. Therefore, there exist many useless bits in a memory (for example, ROM or flash memory) for storing the instruction execution program. Accordingly, a method of representing every register by using the same number of instruction bits prevents the ROM from being used efficiently;        
{circle around (5)} Furthermore, to construct a microprocessor etc. with a programmable logic device (PLD) comprised of memory cells and logic operation elements, a method may be considered for arranging an instruction execution/operation portion and, in its periphery, a register array, a ROM, etc. on the same semiconductor chip. In this case, an increase in size of the instruction execution program owing to a demand for multi-functioning of the processor necessitates an increase in memory capacity of the ROM for storing this program. Therefore, the construct the ROM occupies the memory cells, so that it is difficult to allocate many of the memory cells to the register.